The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 17, 2015
Filed:
May. 22, 2014
Hrl Laboratories, Llc, Malibu, CA (US);
Andrea Corrion, Oak Park, CA (US);
Joel C. Wong, Los Angeles, CA (US);
Keisuke Shinohara, Thousand Oaks, CA (US);
Miroslav Micovic, Thousand Oaks, CA (US);
Ivan Milosavljevic, Thousand Oaks, CA (US);
Dean C. Regan, Simi Valley, CA (US);
Yan Tang, Oak Park, CA (US);
HRL Laboratories, LLC, Mallbu, CA (US);
Abstract
A method of forming a slanted field plate including forming epitaxy for a FET on a substrate, forming a wall near a drain of the FET, the wall comprising a first negative tone electron-beam resist (NTEBR), depositing a dielectric over the epitaxy and the wall, the wall causing the dielectric to have a step near the drain of the FET, depositing a second NTEBR over the dielectric, wherein surface tension causes the deposited second NTEBR to have a slanted top surface between the step and a source of the FET, etching anisotropically vertically the second NTEBR and the dielectric to remove the second NTEBR and to transfer a shape of the slanted top surface to the dielectric, and forming a gatehead comprising metal on the dielectric between the step and the source of the FET, wherein the gatehead forms a slanted field plate.