The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 2015
Filed:
Jun. 21, 2012
Robert L. Maziasz, Austin, TX (US);
Alexander L. Kerre, Solnechnogorsk, RU;
Vladimir P. Rozenfeld, Andreevka, RU;
Mikhail A. Sotnikov, Zelenograd, RU;
Igor G. Topouzov, Zelenograd, RU;
Robert L. Maziasz, Austin, TX (US);
Alexander L. Kerre, Solnechnogorsk, RU;
Vladimir P. Rozenfeld, Andreevka, RU;
Mikhail A. Sotnikov, Zelenograd, RU;
Igor G. Topouzov, Zelenograd, RU;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A layout of a standard cell is created by prioritizing routability characteristics of the standard cell layout. The routability characteristics are prioritized so that the characteristics that are more likely to enhance routing efficiency are emphasized in the cell layout. The prioritization of the routability characteristics can be indicated by a set of weights, with each weight in the set indicating the priority of a corresponding routability characteristic of the standard cell layout. The weights can be used to calculate a weighted sum of the routability characteristics of the standard cell, thereby providing a way to efficiently compare the routability of different standard cell layouts.