The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2015

Filed:

May. 31, 2013
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyo Sun Hwang, Seoul, KR;

Chi Sung Bae, Yongin-si, KR;

Young Jun Hong, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H03D 3/24 (2006.01); H04L 7/033 (2006.01); H03L 7/00 (2006.01); A61B 5/00 (2006.01); H04L 1/18 (2006.01); A61B 5/024 (2006.01); A61B 5/08 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0331 (2013.01); H04L 7/033 (2013.01); H03L 7/00 (2013.01); A61B 5/0022 (2013.01); H04L 1/1864 (2013.01); H04L 7/0083 (2013.01); A61B 5/002 (2013.01); A61B 5/0024 (2013.01); A61B 5/024 (2013.01); A61B 5/0816 (2013.01);
Abstract

A device communicating with a node, includes a communication unit configured to transmit a transmitting data segment to the node, and receive a receiving data segment from the node. The device further includes a phase locked loop (PLL) configured to generate an operating frequency for the communication unit. The device further includes a PLL controller configured to control a hold time and a lock time, of the PLL, that are shared between the node and the device. The device further includes a scheduler configured to schedule the transmitting data segment and the receiving data segment based on the controlled hold time and lock time.


Find Patent Forward Citations

Hwang, Hyo. (2015). Low power communication device for scheduling data segments using hold time or lock time of phase locked loop (U.S. Patent No. 8976919). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8976919

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…