Digital domain accumulative cmos-tdi image sensor with low power consumption

Abstract

The present invention relates to the field of design of analog digital hybrid integrated circuit. The object of the invention is to reduce ADC conversion rate thus further reducing power consumption of the sensor while not reducing line frequency of the CMOS-TDI. To this end, a digital domain accumulative CMOS-TDI image sensor with low power consumption is provided. It includes a pixel array of n+k lines multiplied m columns, a column parallel signal pre-processing circuit, a column parallel successive approximation (SAR) ADC, a column parallel digital domain accumulator, a column parallel divider, a timing control circuit and an output shift register, wherein n+k+1 coarse quantification memory units are provided to the column parallel digital domain accumulator for storage of coarse quantification results; and memory units for storage of n times of fine quantification results are also provided, thus realizing n stages of TDI signal accumulation after accumulation of n times of fine quantification results. The invention is generally used in hybrid integrated circuit design.