The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2015

Filed:

Jul. 25, 2011
Applicants:

Toni Lopez, Kelmis, BE;

Rafael Ignacio Aldaz, Pleasanton, CA (US);

Inventors:

Toni Lopez, Kelmis, BE;

Rafael Ignacio Aldaz, Pleasanton, CA (US);

Assignee:

Koninklijke Philips N.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01); H01L 33/38 (2010.01); H01L 33/20 (2010.01); H01L 33/40 (2010.01); H01L 33/46 (2010.01);
U.S. Cl.
CPC ...
H01L 33/387 (2013.01); H01L 33/20 (2013.01); H01L 33/38 (2013.01); H01L 33/405 (2013.01); H01L 33/46 (2013.01);
Abstract

A shunting pattern on a surface of an LED die comprises an array of metal dots having widths that are on the order of 2Lt-5Lt (where Lt is transfer length) so as not to block a significant amount of light, yet have low contact resistance to the semiconductor current spreading layer. Contact resistance is not significantly reduced with widths greater than 2Lt. Each dot represents a current injection area. For a minimum 2Lt width and 50 square dots per mm2, the top surface area of an LED die will have about 1% of its surface covered by the dots. To cause the current to be evenly distributed over the top surface of the LED, the dots are connected with a grid of very thin metal connectors, having widths much less than 2Lt. In one embodiment, a wire bond electrode is formed near the middle of the top surface of the LED to create a more uniform current distribution.


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