The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2015

Filed:

Jul. 27, 2012
Applicants:

Satoshi Tanimoto, Yokohama, JP;

Yusuke Zushi, Nottingham, GB;

Yoshinori Murakami, Yokohama, JP;

Takashi Iseki, Oume, JP;

Masato Takamori, Oume, JP;

Shinji Sato, Niiza, JP;

Kohei Matsui, Tsukuba, JP;

Inventors:

Satoshi Tanimoto, Yokohama, JP;

Yusuke Zushi, Nottingham, GB;

Yoshinori Murakami, Yokohama, JP;

Takashi Iseki, Oume, JP;

Masato Takamori, Oume, JP;

Shinji Sato, Niiza, JP;

Kohei Matsui, Tsukuba, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/00 (2006.01); B23K 35/28 (2006.01); B23K 35/00 (2006.01); B23K 35/02 (2006.01); C22C 18/04 (2006.01); B23K 1/00 (2006.01); B23K 1/008 (2006.01); B23K 1/19 (2006.01); H01L 29/16 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 24/80 (2013.01); B23K 35/282 (2013.01); B23K 35/286 (2013.01); B23K 35/007 (2013.01); B23K 35/025 (2013.01); C22C 18/04 (2013.01); B23K 1/0016 (2013.01); B23K 1/008 (2013.01); B23K 1/19 (2013.01); H01L 24/32 (2013.01); H01L 24/83 (2013.01); H01L 24/29 (2013.01); H01L 29/1602 (2013.01); H01L 29/1608 (2013.01); H01L 29/2003 (2013.01); B23K 2201/40 (2013.01); B23K 2201/34 (2013.01); B23K 2201/42 (2013.01); H01L 2224/32225 (2013.01); H01L 2924/01322 (2013.01); H01L 2224/83001 (2013.01); H01L 2224/83447 (2013.01); H01L 2924/10254 (2013.01); H01L 2924/10272 (2013.01); H01L 2924/1033 (2013.01); H01L 2924/15787 (2013.01);
Abstract

A method for manufacturing a semiconductor device is carried out by readying each of a semiconductor element, a substrate having Cu as a principal element at least on a surface, and a ZnAl solder chip having a smaller shape than that of the semiconductor element; disposing the semiconductor element and the substrate so that respective bonding surfaces face each other, and sandwiching the ZnAl eutectic solder chip between the substrate and the semiconductor element; increasing the temperature of the ZnAl solder chip sandwiched between the substrate and the semiconductor element while applying a load to the ZnAl solder chip such that the ZnAl solder chip melts to form a ZnAl solder layer; and reducing the temperature of the ZnAl solder layer while applying a load to the ZnAl solder layer.


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