The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 2015
Filed:
Jul. 25, 2011
Kentaro Mori, Tokyo, JP;
Shintaro Yamamichi, Tokyo, JP;
Hideya Murai, Tokyo, JP;
Takuo Funaya, Tokyo, JP;
Masaya Kawano, Kanagawa, JP;
Takehiko Maeda, Kanagawa, JP;
Kouji Soejima, Kanagawa, JP;
Kentaro Mori, Tokyo, JP;
Shintaro Yamamichi, Tokyo, JP;
Hideya Murai, Tokyo, JP;
Takuo Funaya, Tokyo, JP;
Masaya Kawano, Kanagawa, JP;
Takehiko Maeda, Kanagawa, JP;
Kouji Soejima, Kanagawa, JP;
Renesas Electronics Corporation, Kanagawa, JP;
Abstract
A transparent board is positioned on a support board provided with a positioning mark, and a release material is provided. A semiconductor element is then positioned so that the electrode element faces upward, and the support board is then removed. An insulating resin is then formed on the release material so as to cover the semiconductor element; and a via, a wiring layer, an insulation layer, an external terminal, and a solder resist are then formed. The transparent board is then peeled from the semiconductor device through the use of the release material. A chip can thereby be mounted with high precision, there is no need to provide a positioning mark during mounting of the chip on the substrate in the manufacturing process, and the substrate can easily be removed. As a result, a semiconductor device having high density and a thin profile can be manufactured at low cost.