The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 2015
Filed:
Oct. 04, 2011
Suresh K. Venkumahanti, Austin, TX (US);
Lucian Codrescu, Ausgin, TX (US);
Erich James Plondke, Austin, TX (US);
Xufeng Chen, San Diego, CA (US);
Peixin Zhong, San Diego, CA (US);
Suresh K. Venkumahanti, Austin, TX (US);
Lucian Codrescu, Ausgin, TX (US);
Erich James Plondke, Austin, TX (US);
Xufeng Chen, San Diego, CA (US);
Peixin Zhong, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
Systems and method for reducing interrupt latency time in a multi-threaded processor. A first interrupt controller is coupled to the multi-threaded processor. A second interrupt controller is configured to communicate a first interrupt and a first vector identifier to the first interrupt controller, wherein the first interrupt controller is configured to process the first interrupt and the first vector identifier and send the processed interrupt to a thread in the multi-threaded processor. Logic is configured to determine when the multi-threaded processor is ready to receive a second interrupt. A dedicated line is used to communicate an indication to the second interrupt controller that the multi-threaded processor is ready to receive the second interrupt.