The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 2015
Filed:
Sep. 16, 2011
Justin Phelps Black, Santa Clara, CA (US);
Ravindra V. Shenoy, Dublin, CA (US);
Evgeni Petrovich Gousev, Saratoga, CA (US);
Aristotele Hadjichristos, San Diego, CA (US);
Thomas Andrew Myers, San Diego, CA (US);
Jonghae Kim, San Diego, CA (US);
Mario Francisco Velez, San Diego, CA (US);
Je-hsiung Jeffrey Lan, San Diego, CA (US);
Chi Shun Lo, San Diego, CA (US);
Justin Phelps Black, Santa Clara, CA (US);
Ravindra V. Shenoy, Dublin, CA (US);
Evgeni Petrovich Gousev, Saratoga, CA (US);
Aristotele Hadjichristos, San Diego, CA (US);
Thomas Andrew Myers, San Diego, CA (US);
Jonghae Kim, San Diego, CA (US);
Mario Francisco Velez, San Diego, CA (US);
Je-Hsiung Jeffrey Lan, San Diego, CA (US);
Chi Shun Lo, San Diego, CA (US);
QUALCOMM MEMS Technologies, Inc., San Diego, CA (US);
Abstract
This disclosure provides systems, methods and apparatus for combining devices deposited on a first substrate, with integrated circuits formed on a second substrate such as a semiconducting substrate or a glass substrate. The first substrate may be a glass substrate. The first substrate may include conductive vias. A power combiner circuit may be deposited on a first side of the first substrate. The power combiner circuit may include passive devices deposited on at least the first side of the first substrate. The integrated circuit may include a power amplifier circuit disposed on and configured for electrical connection with the power combiner circuit, to form a power amplification system. The conductive vias may include thermal vias configured for conducting heat from the power amplification system and/or interconnect vias configured for electrical connection between the power amplification system and a conductor on a second side of the first substrate.