The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2015

Filed:

Apr. 27, 2011
Applicants:

Marcus Granger-jones, Scotts Valley, CA (US);

Christian Rye Iversen, Vestbjerg, DK;

Inventors:

Marcus Granger-Jones, Scotts Valley, CA (US);

Christian Rye Iversen, Vestbjerg, DK;

Assignee:

RF Micro Devices, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01); H03K 17/10 (2006.01);
U.S. Cl.
CPC ...
H03K 17/102 (2013.01);
Abstract

Described are embodiments of stacked field effect transistor (FET) switch having a plurality of FET devices coupled in series to form an FET device stack. A control circuit provides biasing voltages to the gate, source, and drain contacts of each of the plurality of FET devices to switch the FET device stack to and from a closed state and an open state. In the open state, the gate contacts of each of the plurality of FET devices are biased by the control circuit at the second voltage. To prevent activation in the open state, the control circuit biases the drain contacts and source contacts of each of the plurality of FET devices at the first voltage. The first voltage is positive relative to a reference voltage, such as ground, while the second voltage is non-negative relative to the reference voltage but less than the first voltage.


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