The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2015

Filed:

Jan. 11, 2012
Applicants:

Min-nan Hsieh, Hsinchu County, TW;

Jian-kao Chen, Hsinchu County, TW;

Chin-wei Lin, Hsinchu County, TW;

Inventors:

Min-Nan Hsieh, Hsinchu County, TW;

Jian-Kao Chen, Hsinchu County, TW;

Chin-Wei Lin, Hsinchu County, TW;

Assignee:

MStar Semiconductor, Inc., Hsinchu County, TW;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G09G 5/00 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3648 (2013.01); G09G 3/3614 (2013.01); G09G 2300/0426 (2013.01);
Abstract

A dot inversion TFT array is provided. The dot inversion TFT array includes: a plurality of data lines; a plurality of dot unit pairs, each including a first dot unit and a second dot unit and coupled to one of the data lines; and a plurality of gate line pairs, each including a first gate line and a second gate line. A predetermined dot unit pair of the dot unit pairs is coupled to a predetermined gate line pair of the gate line pairs, and two horizontally neighboring dot unit pairs of the dot unit pairs are mirror-symmetrical.


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