The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2015

Filed:

Aug. 25, 2014
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Sandeep Kesrimal Oswal, Bangalore, IN;

Eeshan Miglani, Chhindwara, IN;

H. Mohammed Shuaeb Fazeel, Bangalore, IN;

Pradeep Nair, Bangalore, IN;

Anand Hariraj Udupa, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01); H03K 5/003 (2006.01);
U.S. Cl.
CPC ...
H03K 5/003 (2013.01);
Abstract

DC offset correction is provided with low frequency support. A first input terminal for receiving an input signal is selectively coupled to a resistance and a capacitor that are series coupled between the first input terminal and a corresponding output terminal. In a calibration phase, the series resistance is coupled between the input terminal and the capacitor and an average voltage level of the input is stored on capacitor. In a signal processing phase, the charged capacitor is coupled in series between the input terminal and the output terminal while the resistance is bypassed. The output signal obtained contains the high and low frequency components of the input signal, while the DC offset in the input signal is removed from the output signal. A differential circuit and methods are disclosed. Additional embodiments are disclosed.


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