The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2015

Filed:

Jun. 26, 2009
Applicants:

Eric Pieraerts, St. Lontest, FR;

Jean-marc Yannou, Colomby sur Thaon, FR;

Stephane Bellenger, Fleury-sur-Orng, FR;

Mickael Pommier, Anguerny, FR;

Inventors:

Eric Pieraerts, St. Lontest, FR;

Jean-Marc Yannou, Colomby sur Thaon, FR;

Stephane Bellenger, Fleury-sur-Orng, FR;

Mickael Pommier, Anguerny, FR;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3107 (2013.01); H01L 21/561 (2013.01); H01L 21/568 (2013.01); H01L 23/3114 (2013.01); H01L 23/3171 (2013.01); H01L 23/3185 (2013.01); H01L 24/19 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/20 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01015 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/14 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/014 (2013.01);
Abstract

Packaged semiconductor product () including a first semiconductor device (A) and a packaging structure with a protective envelope () and a first and second external electrode (). The first semiconductor device (A) has a first substrate (A) and is provided with a first passivation layer (A) and a first electronic structure. The first substrate has a first main surface (). The first substrate (A) is embedded in the protective envelope () and the first main surface () faces a first opening () of the protective envelope (). The first electronic structure has a first and a second contact region () for electrically contacting the first electronic structure. The first passivation layer (A) substantially covers the first main surface () and the first electronic structure. The protective envelope () extends between the first passivation layer (A) and the first external electrode () towards the first contact region ().


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