The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2015
Filed:
Dec. 22, 2011
Sankerlingam Rajendran, Plano, TX (US);
Monte R. Sanchez, Murphy, TX (US);
Susan M. Eshelman, Plano, TX (US);
Douglas R. Gentry, Plano, TX (US);
Thomas A. Hanft, Allen, TX (US);
Sankerlingam Rajendran, Plano, TX (US);
Monte R. Sanchez, Murphy, TX (US);
Susan M. Eshelman, Plano, TX (US);
Douglas R. Gentry, Plano, TX (US);
Thomas A. Hanft, Allen, TX (US);
Raytheon Company, Waltham, MA (US);
Abstract
Integrating a semiconductor component with a substrate through a low loss interconnection formed through adaptive patterning includes forming a cavity in the substrate, placing the semiconductor component therein, filling a gap between the semiconductor component and substrate with a fill of same or similar dielectric constant as that of the substrate and adaptively patterning a low loss interconnection on the fill and extending between the contacts of the semiconductor component and the electrical traces on the substrate. The contacts and leads are located and adjoined using an adaptive patterning technique that places and forms a low loss radio frequency transmission line that compensates for any misalignment between the semiconductor component contacts and the substrate leads.