The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2015
Filed:
Dec. 16, 2013
Applicant:
Nxp B.v., Eindhoven, NL;
Inventors:
Godefridus Adrianus Maria Hurkx, Best, NL;
Jeroen Antoon Croon, Eindhoven, NL;
Johannes Josephus Theodorus Marinus Donkers, Valkenswarrd, NL;
Stephan Heil, Eindhoven, NL;
Jan Sonsky, Leuven, BE;
Assignee:
NXP B.V., Eindhoven, NL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 21/44 (2006.01); H01L 29/47 (2006.01); H01L 29/40 (2006.01); H01L 29/778 (2006.01); H01L 29/872 (2006.01); H01L 23/31 (2006.01); H01L 29/423 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 29/475 (2013.01); H01L 29/401 (2013.01); H01L 29/778 (2013.01); H01L 29/872 (2013.01); H01L 23/3171 (2013.01); H01L 29/42316 (2013.01); H01L 29/7786 (2013.01); H01L 29/2003 (2013.01); H01L 2924/0002 (2013.01); H01L 23/3192 (2013.01);
Abstract
Consistent with an example embodiment, a GaN heterojunction structure has a three-layer dielectric structure. The lowermost and middle portions of the gate electrode together define the gate foot, and this is associated with two dielectric layers. A thinner first dielectric layer is adjacent the gate edge at the bottom of the gate electrode. The second dielectriclayer corresponds to the layer in the conventional structure, and it is level with the main portion of the gate foot.