The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2015

Filed:

May. 30, 2013
Applicants:

William C. Stermer, Jr., Chandler, AZ (US);

Philip H. Bowles, Fountain Hills, AZ (US);

Alan J. Magnus, Gilbert, AZ (US);

Inventors:

William C. Stermer, Jr., Chandler, AZ (US);

Philip H. Bowles, Fountain Hills, AZ (US);

Alan J. Magnus, Gilbert, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); B81C 1/00 (2006.01); B81B 3/00 (2006.01);
U.S. Cl.
CPC ...
B81C 1/00261 (2013.01); B81B 3/0018 (2013.01); B81C 1/00158 (2013.01);
Abstract

Embodiments of microelectronic packages and methods for fabricating microelectronic packages are provided. In one embodiment, the fabrication method includes printing a patterned die attach material onto the backside of a wafer including an array of non-singulated microelectronic die each having an interior keep-out area, such as a central keep-out area. The die attach material, such as a B-stage epoxy, is printed onto the wafer in a predetermined pattern such that the die attach material does not encroaching into the interior keep-out areas. The wafer is singulated to produce singulated microelectronic die each including a layer of die attach material. The singulated microelectronic die are then placed onto leadframes or other package substrates with the die attach material contacting the package substrates. The layer of die attach material is then fully cured to adhere an outer peripheral portion of the singulated microelectronic die to its package substrate.


Find Patent Forward Citations

Stermer, Jr., William. (2015). Microelectronic packages including patterned die attach material and methods for the fabrication thereof (U.S. Patent No. 8962389). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8962389

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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