The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2015

Filed:

Apr. 28, 2011
Applicants:

Yi Cai, Orefield, PA (US);

Ivan Chan, Kanata, CA;

Liming Fang, Allentown, PA (US);

Max J. Olsen, Mertztown, PA (US);

Inventors:

Yi Cai, Orefield, PA (US);

Ivan Chan, Kanata, CA;

Liming Fang, Allentown, PA (US);

Max J. Olsen, Mertztown, PA (US);

Assignee:

LSI Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H04L 25/00 (2006.01); H04L 25/40 (2006.01); G06G 7/16 (2006.01); G01R 31/317 (2006.01); H04B 15/04 (2006.01);
U.S. Cl.
CPC ...
G06G 7/16 (2013.01); H04L 7/00 (2013.01); G01R 31/31709 (2013.01); H04B 15/04 (2013.01);
Abstract

A system for controllably generating jitter in a serial data stream includes a frequency generator and first and second mixers. The frequency generator is configured to output in-phase and quadrature local oscillator signals with a local oscillator frequency of at least about 5 MHz. The local oscillator frequency varies between a selectable minimum frequency and a selectable maximum frequency. The first mixer is configured to mix a fixed frequency clock signal with the in-phase local oscillator signal to output a first mixer output. The second mixer is configured to mix the fixed frequency clock signal with the quadrature local oscillator signal to output a second mixer output. An adder is configured to add the first and second mixer outputs to produce a frequency-modulated clock signal with a frequency that is about the sum of the fixed frequency and the local oscillator frequency and includes a periodic jitter.


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