The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 2015
Filed:
Jun. 27, 2011
Liyang Pan, Beijing, CN;
Fang Yuan, Beijing, CN;
Liyang Pan, Beijing, CN;
Fang Yuan, Beijing, CN;
Tsinghua University, Beijing, CN;
Abstract
A vertically foldable memory array structure is provided, comprising: a memory module distributed in columns and rows, comprising: a drain selection transistor; a bottom connecting line and a source selection transistor; and a plurality of memory cell transistors connected between the drain selection transistor and the bottom connecting line and between the source selection transistor and the bottom connecting line, a drain of each drain selection transistor is connected to a bit line, a drain of a drain selection transistor in a Mvertically foldable memory module in a Ncolumn and a source of a source selection transistor in a (M−1)memory module in a (N+1)column are connected to a same bit line, gates of the drain selection transistors and the source selection transistors in all the memory modules in the Ncolumn are connected to a same drain selection line and a same source selection line.