The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2015

Filed:

Oct. 28, 2013
Applicants:

Amar Kumar Yadav, Delhi, IN;

Indu Bala, Gurgaon, IN;

Zameer Iqbal, Delhi, IN;

Dwarka Prasad, Noida, IN;

Inventors:

Amar Kumar Yadav, Delhi, IN;

Indu Bala, Gurgaon, IN;

Zameer Iqbal, Delhi, IN;

Dwarka Prasad, Noida, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5072 (2013.01);
Abstract

An electronic design automation (EDA) tool for adding a feature to a target parameterized cell (pcell) in an electronic circuit design includes a memory that stores the electronic circuit design, and a processor in communication with the memory. The processor defines a specification of an add-on pcell. The specification includes a feature to be added to the target pcell. The processor reads the properties associated with the target pcell and generates the add-on pcell based on its specification and the properties of the target pcell. The add-on pcell then is instantiated and bound to the target pcell, which adds the feature to the target pcell.


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