The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 10, 2015
Filed:
Dec. 07, 2010
Yie-fong Dan, Cupertino, CA (US);
Shi-jie Wen, Sunnyvale, CA (US);
Raymond NG, Sunnyvale, CA (US);
Cisco Technology, Inc., San Jose, CA (US);
Abstract
A method that determines the system impact of single event upset (SEU) and a single event upset (SEU) wrapper that controls a SEU controller is disclosed. The method injects faults into a component (e.g. FPGA, ASIC) of an operational system that is carrying live traffic and monitors the system's response to the faults to determine the impact of SEU on the system. The SEU wrapper sends the SEU controller a pattern scheme that includes information indicating when, where, how often, and/or how long to inject bursts of one or more faults into memory of the component of the system. A burst of faults contains faults that are consecutively injected into the array of memory blocks. After each fault in a burst is injected, one or more errors in one or more memory elements are detected and/or corrected. Information regarding the detection and/or the correction of an error is updated using registers that store counters. After injecting a burst of faults, the SEU controller waits for a predetermined amount of time. While waiting for a predetermined amount of time, the system monitors the system response to the burst of faults, such as monitoring the system for failures. After waiting, the SEU controller determines whether to inject another burst of faults. Bursts of faults are injected into the plurality of memory blocks until a system failure is detected or until the pattern scheme indicates to no longer inject bursts of faults into the memory.