The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 10, 2015
Filed:
Feb. 07, 2012
Applicant:
Pei-si Wu, Kao Hsiung, TW;
Inventor:
Pei-Si Wu, Kao Hsiung, TW;
Assignee:
Realtek Semiconductor Corp., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 3/46 (2006.01); H04B 17/00 (2006.01); H04Q 1/20 (2006.01); H03L 7/081 (2006.01); H04L 1/20 (2006.01); H03L 7/08 (2006.01); H03L 7/093 (2006.01);
U.S. Cl.
CPC ...
H04L 1/205 (2013.01); H03L 7/0814 (2013.01); H03L 7/0807 (2013.01); H03L 7/093 (2013.01);
Abstract
A clock and data recovery circuit with built in jitter tolerance test is disclosed. Imposing jitter on a filter inside a CDR loop to cause phase disturbances to the clock and data recovery circuit, thereby to test the jitter tolerance of the clock and data recovery circuit. Accordingly, IC test cost is significantly reduced by increasing few circuit sizes.