The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2015

Filed:

Apr. 25, 2012
Applicants:

Yoji Nishio, Tokyo, JP;

Takao Hirayama, Tokyo, JP;

Susumu Hatano, Tokyo, JP;

Haruki Nagahashi, Tokyo, JP;

Masashi Kawamura, Tokyo, JP;

Tadaaki Yoshimura, Tokyo, JP;

Inventors:

Yoji Nishio, Tokyo, JP;

Takao Hirayama, Tokyo, JP;

Susumu Hatano, Tokyo, JP;

Haruki Nagahashi, Tokyo, JP;

Masashi Kawamura, Tokyo, JP;

Tadaaki Yoshimura, Tokyo, JP;

Assignee:

PS4 Luxco S.a.r.l., Luxembourg, LU;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4086 (2013.01);
Abstract

Disclosed herein is a device that includes a plurality of semiconductor chips mounted on a module substrate. Each of the semiconductor chips includes a reset terminal to which a reset signal is supplied, and an internal circuit that is initialized based on the reset signal. The module substrate includes a reset signal line connected commonly to the reset terminals of the semiconductor chips, and an anti-resonance element connected to the reset signal line.


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