The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2015

Filed:

Dec. 31, 2012
Applicants:

Xiaodong Wang, Austin, TX (US);

Shouli Yan, Austin, TX (US);

Axel Thomsen, Austin, TX (US);

Jinwen Xiao, Sunnyvale, CA (US);

Inventors:

Xiaodong Wang, Austin, TX (US);

Shouli Yan, Austin, TX (US);

Axel Thomsen, Austin, TX (US);

Jinwen Xiao, Sunnyvale, CA (US);

Assignee:

Silicon Laboratories Inc., Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/38 (2006.01); H03K 5/24 (2006.01); H03M 1/12 (2006.01); H03M 1/00 (2006.01); H03M 1/80 (2006.01); H03M 1/06 (2006.01);
U.S. Cl.
CPC ...
H03M 1/38 (2013.01); H03K 5/24 (2013.01); H03M 1/12 (2013.01); H03M 1/00 (2013.01); H03M 1/804 (2013.01); H03M 1/0695 (2013.01);
Abstract

A circuit includes a comparator including a first input, a second input, and an output. The circuit further includes a plurality of capacitive sampling circuits configured to be selectively coupled to the first and second inputs. Each of the plurality of capacitive sampling circuits includes first and second capacitors, and includes first and second conversion switches configured to selectively couple the first and second capacitors to the first and second inputs, respectively. The first and second conversion switches of a selected one of the plurality of capacitive sampling circuits are closed to couple the selected one to the first and second inputs of the comparator during a conversion phase.


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