The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 03, 2015

Filed:

Jan. 27, 2010
Applicants:

Douglas J. Joseph, Danbury, CT (US);

Mark B. Ritter, Sherman, CT (US);

José A. Tierno, Stamford, CT (US);

Inventors:

Douglas J. Joseph, Danbury, CT (US);

Mark B. Ritter, Sherman, CT (US);

José A. Tierno, Stamford, CT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); H03M 13/03 (2006.01); G06F 11/10 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
H03M 13/03 (2013.01); G06F 11/1028 (2013.01); G11C 7/1006 (2013.01); G11C 2207/104 (2013.01);
Abstract

Techniques are disclosed for minimizing the effects of soft errors associated with memory devices that are individually accessible. By way of example, a method of organizing a column in a memory array of a memory device protected by an error correction code comprises the step of maximizing a distance of the error correction code by maximizing a physical distance between memory bits associated with a memory line within the column protected by the error correction code. Other soft error protection techniques may include use of a feed forward error correction code or use of a memory operation (e.g., read or write operation) suppress and retry approach.


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