The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 03, 2015
Filed:
Dec. 14, 2011
Maarten J. Boersma, Holzgerlingen, DE;
Markus Kaltenbach, Leinfelden, DE;
Christophe J. Layer, Boeblingen, DE;
Jens Leenstra, Bondorf, DE;
Silvia M. Mueller, Altdorf, DE;
Maarten J. Boersma, Holzgerlingen, DE;
Markus Kaltenbach, Leinfelden, DE;
Christophe J. Layer, Boeblingen, DE;
Jens Leenstra, Bondorf, DE;
Silvia M. Mueller, Altdorf, DE;
International Business Machines Corporation, Armonk, NY (US);
Abstract
Techniques for reducing issue-to-issue latency by reversing processing order in half-pumped single instruction multiple data (SIMD) execution units are described. In one embodiment a processor functional unit is provided comprising a frontend unit, and execution core unit, a backend unit, an execution order control signal unit, a first interconnect coupled between and output and an input of the execution core unit and a second interconnect coupled between an output of the backend unit and an input of the frontend unit. In operation, the execution order control signal unit generates a forwarding order control signal based on the parity of an applied clock signal on reception of a first vector instruction. This control signal is in turn used to selectively forward first and second portions of an execution result of the first vector instruction via the interconnects for use in the execution of a dependent second vector instruction.