The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 03, 2015
Filed:
Sep. 30, 2009
Applicants:
Ka Y. Leung, Austin, TX (US);
Jean-luc Nauleau, Los Gatos, CA (US);
Inventors:
Ka Y. Leung, Austin, TX (US);
Jean-Luc Nauleau, Los Gatos, CA (US);
Assignee:
Silicon Laboratories Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/72 (2006.01); H01L 23/495 (2006.01); H01L 23/52 (2006.01); H01L 23/58 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49575 (2013.01); H01L 23/4952 (2013.01); H01L 23/52 (2013.01); H01L 23/585 (2013.01); H01L 24/73 (2013.01); H01L 2224/40 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/48257 (2013.01); H01L 2224/49171 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/19041 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 2924/01033 (2013.01);
Abstract
A semiconductor wafer including a plurality of die fabricated therein in a defined pattern. They are separated from each other by a dicing area or street and at least a portion of adjacent die on the wafer include at least a conductive connection between given adjacent die that is electrically interfaced to circuitry disposed on the given adjacent die.