The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 03, 2015

Filed:

Apr. 15, 2010
Applicants:

Peter Alan Levine, West Windsor, NJ (US);

Pradyumna Swain, Gaithersburg, MD (US);

Mahalingam Bhaskaran, Lawrenceville, NJ (US);

Inventors:

Peter Alan Levine, West Windsor, NJ (US);

Pradyumna Swain, Gaithersburg, MD (US);

Mahalingam Bhaskaran, Lawrenceville, NJ (US);

Assignee:

SRI International, Menlo Park, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 27/146 (2006.01); H01L 27/148 (2006.01); H01L 31/18 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14643 (2013.01); H01L 27/148 (2013.01); H01L 31/18 (2013.01); H01L 31/1892 (2013.01); Y02E 10/50 (2013.01);
Abstract

A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The device includes an insulator layer; a semiconductor substrate, having an interface with the insulator layer; an epitaxial layer grown on the semiconductor substrate by epitaxial growth; and one or more imaging components in the epitaxial layer in proximity to a face of the epitaxial layer, the face being opposite the interface of the semiconductor substrate and the insulator layer, the imaging components comprising junctions within the epitaxial layer; wherein the semiconductor substrate and the epitaxial layer exhibit a net doping concentration having a maximum value at a predetermined distance from the interface of the insulating layer and the semiconductor substrate and which decreases monotonically on both sides of the profile from the maximum value within a portion of the semiconductor substrate and the epitaxial layer. The doping profile between the interface with the insulation layer and the peak of the doping profile functions as a 'dead band' to prevent dark current carriers from penetrating to the front side of the device.


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