The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2015

Filed:

May. 09, 2012
Applicants:

Sudeep Ravi Kottilingal, San Diego, CA (US);

Jayanth Mandayam, San Diego, CA (US);

Ron Keidar, San Diego, CA (US);

Inventors:

Sudeep Ravi Kottilingal, San Diego, CA (US);

Jayanth Mandayam, San Diego, CA (US);

Ron Keidar, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/00 (2013.01); G06F 17/00 (2006.01); G06F 12/14 (2006.01); G06F 21/62 (2013.01); G06F 21/79 (2013.01);
U.S. Cl.
CPC ...
G06F 12/1408 (2013.01); G06F 21/6218 (2013.01); G06F 21/79 (2013.01); G06F 2221/2113 (2013.01);
Abstract

A processor is utilized for processing data from a buffer memory. The processor, implemented in hardware, may allow writing of output data, processed based on input data from at least one secure location associate with a secure address range of the buffer memory, to one or more secure locations associated with the secure address range. Further, the processor may block writing of output data, processed based on input data from at least one secure location associated with the secure address range, to one or more insecure locations associated with an insecure address range of the buffer memory.


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