The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2015

Filed:

Aug. 14, 2009
Applicants:

Sujat Jamil, Gilbert, AZ (US);

R. Frank O'bleness, Tempe, AZ (US);

Russell Robideau, Chandler, AZ (US);

Tom Hameenanttila, Phoenix, AZ (US);

Joseph Delgross, Chandler, AZ (US);

David Miner, Chandler, AZ (US);

Inventors:

Sujat Jamil, Gilbert, AZ (US);

R. Frank O'Bleness, Tempe, AZ (US);

Russell Robideau, Chandler, AZ (US);

Tom Hameenanttila, Phoenix, AZ (US);

Joseph Delgross, Chandler, AZ (US);

David Miner, Chandler, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3826 (2013.01); G06F 9/3842 (2013.01); G06F 9/3859 (2013.01);
Abstract

Aspects of the disclosure provide methods for cache efficiency. A method for cache efficiency can include storing data in a buffer entry in association with a cache array in response to a first store instruction that hits the cache array before the first store instruction is committed. Further, when a dependent load instruction is subsequent to the first store instruction, the method can include providing the data from the buffer entry in response to the first dependent load instruction. When a second store instruction overlaps an address of the first store instruction, the method can include coalescing data of the second store instruction in the buffer entry before the second store instruction is committed. When the second store instruction is followed by a second dependent load instruction, the method can include providing the coalesced data from the buffer entry in response to the second dependent load instruction.


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