The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 27, 2015
Filed:
Oct. 12, 2009
Applicants:
Saikrishna Kotha, Austin, TX (US);
Bruce Anthony Holmes, Austin, TX (US);
Gaurav Chawla, Austin, TX (US);
Inventors:
Saikrishna Kotha, Austin, TX (US);
Bruce Anthony Holmes, Austin, TX (US);
Gaurav Chawla, Austin, TX (US);
Assignee:
Dell Products L.P., Round Rock, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04W 4/00 (2009.01); H04L 12/28 (2006.01); H04L 12/741 (2013.01); H04L 12/891 (2013.01); H04L 12/743 (2013.01); H04L 12/709 (2013.01);
U.S. Cl.
CPC ...
H04L 45/745 (2013.01); H04L 47/41 (2013.01); H04L 45/7453 (2013.01); H04L 45/54 (2013.01); H04L 45/245 (2013.01);
Abstract
Systems and methods for hierarchical link aggregation are disclosed. A system for hierarchical link aggregation may include a network interface having a plurality of physical ports. A first plurality of the physical ports may be configured as member ports of a first link aggregation group (LAG). A second plurality of the physical ports may be configured as member ports of a second LAG. The first LAG and second LAG may be configured as member logical ports of a third LAG.