The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2015

Filed:

Mar. 26, 2012
Applicants:

Shin Tack Kang, Yongin-si, KR;

Kyung-hee Kim, Seoul, KR;

Beom Jun Kim, Seoul, KR;

Sung Man Kim, Seoul, KR;

Jong Hwan Lee, Anyang-si, KR;

Hong Woo Lee, Asan-si, KR;

Hye Rhee Han, Suwon-si, KR;

Ji Hye Heo, Cheonan-si, KR;

Inventors:

Shin Tack Kang, Yongin-si, KR;

Kyung-Hee Kim, Seoul, KR;

Beom Jun Kim, Seoul, KR;

Sung Man Kim, Seoul, KR;

Jong Hwan Lee, Anyang-si, KR;

Hong Woo Lee, Asan-si, KR;

Hye Rhee Han, Suwon-si, KR;

Ji Hye Heo, Cheonan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G09G 5/00 (2006.01); G09G 3/20 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3674 (2013.01); G09G 3/20 (2013.01); G09G 2300/0408 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/0289 (2013.01); G09G 2310/0291 (2013.01); G09G 2320/045 (2013.01);
Abstract

A display panel includes a gate driver connected to a gate line, where the gate driver includes a plurality of stages, where each of the stages includes at least one dual gate thin film transistor having a first control terminal and a second control terminal, and where each of the stages receives a clock signal, a first low voltage, a second low voltage, at least one transmission signal of previous stages, at least two transmission signals of subsequent stages and an output control signal from one of the stages to output a gate voltage including a gate-on voltage and a gate-off voltage.


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