The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2015

Filed:

Sep. 27, 2012
Applicant:

St-ericsson SA, Plan-les-Ouates, CH;

Inventor:

Fabien Journet, Grenoble, FR;

Assignee:

ST-Ericsson SA, Plan-les-Ouates, CH;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 21/00 (2006.01); H03K 21/08 (2006.01); H04B 15/06 (2006.01);
U.S. Cl.
CPC ...
H03K 21/08 (2013.01); H04B 15/06 (2013.01);
Abstract

The invention concerns a device for providing a spread frequency clock signal, comprising: —an input () to receive a first clock signal having a first frequency; —a programmable clock divider () to generate the spread frequency clock signal from the first clock signal; —a first Feedback Shift Register (), FSR, comprising at least one stage, the FSR being adapted to generate any of an odd number M of different values, the FSR being adapted to pseudo-randomly generate a first sequence of first output values, each corresponding to one of said M different values, and to provide a first output value, according to the sequence, during each clock cycle of the spread frequency clock signal; —a control unit () adapted to select a division factor of the programmable clock divider based on the first output value of the FSR during each clock cycle of the spread frequency clock signal; —an output () for providing the spread frequency clock signal.


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