The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2015
Filed:
Mar. 02, 2012
Lawrence S. Pellach, Malden, MA (US);
Edward H. Truex, Sudbury, MA (US);
Bhupen Shah, Boxborough, MA (US);
Lawrence S. Pellach, Malden, MA (US);
Edward H. Truex, Sudbury, MA (US);
Bhupen Shah, Boxborough, MA (US);
Acacia Communications, Inc., Maynard, MA (US);
Abstract
Methods and apparatus for controlling the power-on current transients and for providing a gradual current draw in an ASIC or FPGA having a high gate count and a number of physical blocks are disclosed. Additionally, method(s) are disclosed which ensure related blocks emerge from a reset state on a common clock cycle even when the related blocks are geographically dispersed over a large area producing multiple clock cycle latency periods for signals between blocks. Complete flexibility of physical block start up is achieved by software control which permits the sequence and number of physical blocks started simultaneously.