The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2015

Filed:

Mar. 05, 2014
Applicant:

Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;

Inventors:

Sung-Hyun Cho, Suwon-si, KR;

Dongin Kim, Suwon-si, KR;

Junseok Park, Seoul, KR;

Taemin Lee, Hwaseong-si, KR;

Chaesuk Lim, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01); G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0619 (2013.01); G06F 3/0647 (2013.01); G06F 3/0679 (2013.01); G06F 12/0246 (2013.01); G06F 11/1008 (2013.01);
Abstract

A nonvolatile storage device in accordance with the inventive concepts includes a nonvolatile memory device comprising a first memory area, a second memory area, and a memory controller. The memory controller includes a first register configured to store reliable mode information, and a second register configured to store operating system (OS) image information. The memory controller is configured to receive a command from a host based on the reliable mode information; determine whether the command is a write request for an OS image and whether OS image information accompanying the command matches the OS image information stored in the second register; write the OS image to the first memory area if the OS image information accompanying the command matches the OS image information stored in the second register, and block data migration of the OS image from the first memory area to the second memory area.


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