The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2015

Filed:

Mar. 13, 2013
Applicant:

Pmc-sierra Us, Inc., Sunnyvale, CA (US);

Inventors:

Saeed Fard, Calgary, CA;

Sean Gibb, Calgary, CA;

Peter Graumann, Calgary, CA;

Siavash Sheikh Zeinoddin, Ottawa, CA;

Assignee:

PMC-Sierra US, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 27/08 (2006.01); H04L 1/00 (2006.01);
U.S. Cl.
CPC ...
H04L 1/0036 (2013.01);
Abstract

A circuit for reducing phase errors in a digital communication systems signal is provided. The circuit comprises a demodulator block, a feed-forward path, a feed-back path, and a slicer. The demodulator block generates a plurality of samples from the signal and determines for each sample a corresponding phase error. The feed-forward path is configured to reduce in the signal a high frequency component of the phase errors. The feed-back path configured to reduce in the signal a low frequency component of the phase errors. The slicer selectively forwards phase errors to the feed-forward path or the feed-back path based on a respective magnitude of the phase error when operating in a decision-directed mode.


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