The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2015

Filed:

Aug. 20, 2014
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Sagheer Ahmad, Cupertino, CA (US);

Alex S. Warshofsky, Miami Beach, FL (US);

Ygal Arbel, Morgan Hill, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 23/02 (2006.01); H03D 3/00 (2006.01); H03K 9/06 (2006.01); H03K 5/19 (2006.01);
U.S. Cl.
CPC ...
H03K 5/19 (2013.01);
Abstract

A clock monitoring circuit is disclosed. The clock monitoring circuit is configured to receive first and second clock signals generated in respective clock domains. The clock monitoring circuit includes a first counter configured to count clock cycles of the first clock signal for a first period of time delineated by clock cycles of the second clock signal. The first counter outputs a count value indicating the number of counted clock cycles. The clock monitoring circuit also includes a threshold comparator circuit configured to generate an error signal in response to expiration of the first period of time and the first count value output by the first counter falling outside of an expected range.


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