The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2015

Filed:

Jan. 24, 2012
Applicants:

Masashi Fujita, Tokyo, JP;

Yutaka Shionoiri, Kanagawa, JP;

Hiroyuki Tomatsu, Kanagawa, JP;

Hidetomo Kobayashi, Kanagawa, JP;

Inventors:

Masashi Fujita, Tokyo, JP;

Yutaka Shionoiri, Kanagawa, JP;

Hiroyuki Tomatsu, Kanagawa, JP;

Hidetomo Kobayashi, Kanagawa, JP;

Assignee:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); G11C 11/34 (2006.01); H01L 21/84 (2006.01); H01L 27/115 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 21/84 (2013.01); H01L 27/1156 (2013.01); H01L 27/1203 (2013.01); H01L 27/1222 (2013.01); H01L 27/1225 (2013.01); H01L 27/1251 (2013.01);
Abstract

A first field-effect transistor provided over a substrate in which an insulating region is provided over a first semiconductor region and a second semiconductor region is provided over the insulating region; an insulating layer provided over the substrate; a second field-effect transistor that is provided one flat surface of the insulating layer and includes an oxide semiconductor layer; and a control terminal are provided. The control terminal is formed in the same step as a source and a drain of the second field-effect transistor, and a voltage for controlling a threshold voltage of the first field-effect transistor is supplied to the control terminal.


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