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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8937012 B1

PDFFull Text
Date of Patent:
Jan. 20, 2015

Filed:

Aug. 30, 2011

Production method for semiconductor device

Applicants:

Hai Won Kim, Gyeonggi-do, KR;

Sang Ho Woo, Gyeonggi-do, KR;

Sung Kil Cho, Gyeonggi-do, KR;

Gil Sun Jang, Gyeonggi-do, KR;

Inventors:

Hai Won Kim, Gyeonggi-do, KR;

Sang Ho Woo, Gyeonggi-do, KR;

Sung Kil Cho, Gyeonggi-do, KR;

Gil Sun Jang, Gyeonggi-do, KR;

Assignee:

Eugene Technology Co., Ltd., Gyeonggi-do, KR;

Attorney:

Rabin & Berdo, P.C.

Primary Examiner:

Bac Au

Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 21/02 (2006.01); H01L 21/8238 (2006.01); H01L 21/3205 (2006.01); H01L 29/49 (2006.01); C01B 33/06 (2006.01); H01L 27/115 (2006.01); H01L 29/66 (2006.01); C23C 16/02 (2006.01); C23C 16/04 (2006.01); C23C 16/24 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02697 (2013.01); H01L 21/823835 (2013.01); H01L 21/32051 (2013.01); H01L 29/4975 (2013.01); C01B 33/06 (2013.01); H01L 27/11521 (2013.01); H01L 27/11568 (2013.01); H01L 29/66825 (2013.01); H01L 29/66833 (2013.01); C23C 16/0227 (2013.01); C23C 16/04 (2013.01); C23C 16/24 (2013.01); H01L 21/28273 (2013.01); H01L 21/28282 (2013.01);
Abstract

Provided is a production method for a semiconductor device comprising a metal silicide layer. According to one embodiment of the present invention, the production method for a semiconductor device comprises the steps of: forming an insulating layer on a substrate, on which a polysilicon pattern has been formed, in such a way that the polysilicon pattern is exposed; forming a silicon seed layer on the exposed polysilicon pattern that has been selectively exposed with respect to the insulating layer; forming a metal layer on the substrate on which the silicon seed layer has been formed; and forming a metal silicide layer by carrying out a heat treatment on the substrate on which the metal layer has been formed.

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