The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2015
Filed:
Mar. 01, 2006
Armin Tilke, Beacon, NY (US);
Marcus Culmsee, Wappingers Falls, NY (US);
Chris Stapelmann, Tervuren, BE;
Bee Kim Hong, Dresden, DE;
Roland Hampp, Poughkeepsie, NY (US);
Armin Tilke, Beacon, NY (US);
Marcus Culmsee, Wappingers Falls, NY (US);
Chris Stapelmann, Tervuren, BE;
Bee Kim Hong, Dresden, DE;
Roland Hampp, Poughkeepsie, NY (US);
Infineon Technologies AG, Neubiberg, DE;
Abstract
Methods of fabricating isolation regions of semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece and at least one trench formed in the workpiece. The at least one trench includes sidewalls, a bottom surface, a lower portion, and an upper portion. A first liner is disposed over the sidewalls and the bottom surface of the at least one trench. A second liner is disposed over the first liner in the lower portion of the at least one trench. A first insulating material is disposed over the second liner in the lower portion of the at least one trench. A second insulating material is disposed over the first insulating material in the upper portion of the at least one trench. The first liner, the second liner, the first insulating material, and the second insulating material comprise an isolation region of the semiconductor device.