The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 13, 2015
Filed:
Mar. 12, 2003
Stefan Jacob, Santa Clara, CA (US);
Martin Peisl, San Jose, CA (US);
Harald Zweck, Munich, DE;
Infineon Technologies AG, Neubiberg, DE;
Abstract
A delay locked loop (DLL) circuit having an expanded operating frequency range is achieved by providing multiple DLLs, each having a different range of operating frequencies. A selection mechanism selects the DLL with the appropriate operating frequency range. The output of the selected DLL is used as the output of the delay locked loop circuit and is fed back to the input of the selected DLL so as to achieve phase lock with an input signal. The selection mechanism can operate in accordance with, among other things, a metallization mask option, the state of one or more pins, the state of one or more bits of a software accessible register or storage device, or the output of a frequency detector which detects the frequency of the input clock signal. The selection mechanism can also cause the selected DLL to be activated and the unselected DLL(s) to be deactivated, thereby conserving power.