The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2015

Filed:

Jul. 17, 2013
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventor:

Sung-Gon Jung, Yongin-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 19/00 (2011.01); G21K 5/00 (2006.01); G03F 1/00 (2012.01);
U.S. Cl.
CPC ...
G06F 17/5081 (2013.01); G06F 19/00 (2013.01); G06F 17/5072 (2013.01); G06F 2217/12 (2013.01); G21K 5/00 (2013.01); G03F 1/00 (2013.01);
Abstract

Embodiments relate to a method of decomposing a layout of a semiconductor device. The method may include generating a pattern layout including first patterns and second patterns, generating an interference map for the pattern layout, the interference map including optical interference information regarding the first and second patterns, and decomposing the pattern layout into a first decomposition pattern layout including the first patterns, and a second decomposition pattern layout including the second patterns, based on the interference map. In the interference map, an influence of constructive interference on the first patterns may be greater than an influence of constructive interference on the second patterns.


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