The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2015

Filed:

Jan. 31, 2013
Applicants:

Ki-seok OH, Uiwang-Si, KR;

Joon-young Park, Seoul, KR;

Yong-hun Ahn, Seoul, KR;

Yong-cheol Bae, Yongin-Si, KR;

Yong-gwon Jeong, Uiwang-Si, KR;

Jong-hyun Choi, Seoul, KR;

Inventors:

Ki-Seok Oh, Uiwang-Si, KR;

Joon-Young Park, Seoul, KR;

Yong-Hun Ahn, Seoul, KR;

Yong-Cheol Bae, Yongin-Si, KR;

Yong-Gwon Jeong, Uiwang-Si, KR;

Jong-Hyun Choi, Seoul, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01); H03K 19/003 (2006.01); H03K 19/0175 (2006.01); H04L 25/02 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
H03K 19/017545 (2013.01); H03K 19/0175 (2013.01); H04L 25/0264 (2013.01); G11C 7/1057 (2013.01); G11C 2207/2272 (2013.01);
Abstract

An ODT circuit is activated/deactivated in response to a latency control signal or a clock enable signal. The ODT circuit includes an ODT control circuit and an ODT section. The ODT control circuit determines an ODT status based on a read latency control signal (RL) and/or a write latency control signal (WL) to generate an ODT control signal. The ODT section is activated/deactivated in response to the ODT control signal.


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