The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 2014
Filed:
Sep. 30, 2009
Gil Moran, Meitar, IL;
Evgeni Ginzburg, Petah Tikva, IL;
Adi Katz, Ramat Gan, IL;
Erez Shaizaf, Moshav Nir Chen, IL;
Gil Moran, Meitar, IL;
Evgeni Ginzburg, Petah Tikva, IL;
Adi Katz, Ramat Gan, IL;
Erez Shaizaf, Moshav Nir Chen, IL;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A distributed debug system including processing elements connected to perform a plurality of processing functions on a received data unit, a debug trap unit, a debug trace dump logic unit, and a debug initiator unit is provided. At least two of the processing elements include a debug trap unit that has a first debug enable input and output, and a first debug thread. The first debug thread holds at least a first debug trap circuit having a match signal output connected to the first debug enable output. The first debug trap circuit filters a part of the data unit, compares a filtering result with a debug value, and provides a match signal to the match signal output. The debug trace dump logic unit dumps debug trace data to a buffer associated with the data unit on reception of a match event. The debug initiator unit includes a debug initiator output connected to the first debug enable input of the debug trap unit of one processing element, and a debug initiator input connected to the first debug enable output of the debug trap unit of another processing element.