The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2014

Filed:

Oct. 19, 2011
Applicants:

Tae-hong Park, Seoul, KR;

Ji-yong Yoon, Suwon-si, KR;

Kang-min Lee, Suwon-si, KR;

Yun-ju Kwon, Yongin-si, KR;

Jong-hyuck Hong, Suwon-si, KR;

Inventors:

Tae-Hong Park, Seoul, KR;

Ji-Yong Yoon, Suwon-si, KR;

Kang-Min Lee, Suwon-si, KR;

Yun-Ju Kwon, Yongin-si, KR;

Jong-Hyuck Hong, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
G06F 1/324 (2013.01); Y02B 60/1235 (2013.01); G06F 1/3253 (2013.01); G06F 1/3215 (2013.01); G06F 1/3228 (2013.01);
Abstract

An apparatus and method for adaptively changing clock frequencies of a Central Processing Unit (CPU) and a bus in a digital system are provided. The system includes an Adaptive Frequency Scaling (AFS) controller and a clock controller. The AFS controller determines whether to change a clock frequency of the CPU according to operation information of the CPU, and determines whether to change a clock frequency of the bus according to operation information of the bus. The clock controller generates a clock frequency of the CPU and a clock frequency of the bus according to the determination of the AFS controller.


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