The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2014

Filed:

Mar. 08, 2012
Applicants:

Gordon Alexander Charles, Sunnyvale, CA (US);

Maxim Moiseev, Santa Clara, CA (US);

Jonathan Simon, Castro Valley, CA (US);

Inventors:

Gordon Alexander Charles, Sunnyvale, CA (US);

Maxim Moiseev, Santa Clara, CA (US);

Jonathan Simon, Castro Valley, CA (US);

Assignee:

Dust Networks, Inc., Hayward, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/18 (2006.01); F15B 11/036 (2006.01); G11C 16/16 (2006.01);
U.S. Cl.
CPC ...
F15B 11/0365 (2013.01); G11C 16/16 (2013.01); F15B 2211/7055 (2013.01);
Abstract

The erasing of data stored in a nonvolatile memory is performed using multiple partial erase operations. Each partial erase operation has a time duration that is shorter than the minimum time duration of an erase operation that is needed to reliably erase the data stored in the storage location. However, the sum of the time durations of the multiple partial erase operations is sufficient to reliably erase the data in the storage location. In one example, during a partial erase operation, a voltage is applied to a memory storage transistor to remove some, but not necessarily all, of the charge stored on a charge storage layer of the transistor. Following multiple partial erase operations, sufficient charge is removed from the charge storage layer to ensure reliable data erasure.


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