The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8923473 B1

PDF
Full Text
Expired
Date of Patent:
Dec. 30, 2014

Filed:

Aug. 31, 2011
Applicants:

Yasushi Sasaki, Osaka, JP;

Yuhichiroh Murakami, Osaka, JP;

Etsuo Yamamoto, Osaka, JP;

Inventors:

Yasushi Sasaki, Osaka, JP;

Yuhichiroh Murakami, Osaka, JP;

Etsuo Yamamoto, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 19/00 (2006.01); H03K 17/00 (2006.01); G09G 3/36 (2006.01); G11C 19/18 (2006.01); G11C 19/28 (2006.01); H03K 19/003 (2006.01);
U.S. Cl.
CPC ...
H03K 17/005 (2013.01); G09G 3/3677 (2013.01); G11C 19/184 (2013.01); G11C 19/28 (2013.01); H03K 19/00315 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01);
Abstract

A signal processing circuit of the present invention includes: a first input terminal; a second input terminal; a third input terminal; a first node; a second node; an output terminal; a resistor; a first signal generating section which (i) is connected to the first node, a third input terminal, and the output terminal and (ii) includes a bootstrap capacitor; and a second signal generating section which is connected to the second node, a first power supply, and the output terminal. The first node becomes active in a case where the first input terminal becomes active. The second node becomes active in a case where the second input terminal becomes active. The output terminal is connected to the first power supply via the resistor. With the configuration, it is possible to have an improvement in operational stability of the signal processing circuit.


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