The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2014

Filed:

May. 19, 2008
Applicants:

Conor O'keeffe, Douglas, IE;

Kiyoshi Kase, Austin, TX (US);

Paul Kelleher, Aherla, IE;

Inventors:

Conor O'Keeffe, Douglas, IE;

Kiyoshi Kase, Austin, TX (US);

Paul Kelleher, Aherla, IE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H04L 7/033 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0337 (2013.01);
Abstract

A semiconductor device comprises sampling logic, comprising: input sample path selection logic arranged to enable at least one input sample path; sampler logic arranged to receive and sample an input data signal in a serial data stream in accordance with a phase of the at least one enabled input sample path; and transition detection logic arranged to detect transitions within the received input data signal. The input sample path selection logic is further arranged, upon detection of a transition within the received input data signal, to determine if the phase of the at least one input sample path is a phase having a largest window between logic values; and if it is determined that the phase of the at least one input sample path is not the phase having a largest window between logic values, to enable at least one input sample path comprising a more appropriate phase.


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