The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2014

Filed:

Dec. 30, 2010
Applicants:

Yong-hoon Son, Yongin-si, KR;

Myoung Bum Lee, Seoul, KR;

Ki Hyun Hwang, Seongnam-si, KR;

Seung Jae Baik, Hwaseong-si, KR;

Inventors:

Yong-Hoon Son, Yongin-si, KR;

Myoung Bum Lee, Seoul, KR;

Ki Hyun Hwang, Seongnam-si, KR;

Seung Jae Baik, Hwaseong-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); H01L 29/66 (2006.01); H01L 27/115 (2006.01); G11C 5/04 (2006.01); G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11551 (2013.01); G11C 5/04 (2013.01); G11C 5/063 (2013.01); H01L 27/11556 (2013.01); H01L 27/11578 (2013.01); H01L 27/11582 (2013.01);
Abstract

A three-dimensional semiconductor device comprises active patterns arranged two-dimensionally on a substrate, electrodes arranged three-dimensionally between the active patterns, and memory regions arranged three-dimensionally at intersecting points defined by the active patterns and the electrodes. Each of the active patterns is used as a common current path for an electrical connection to two different memory regions that are formed at the same height from the substrate.


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