The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 2014
Filed:
Jul. 19, 2012
Applicants:
Chien-hung Liu, Taipei, TW;
Cheng-te Chou, Taipei, TW;
Inventors:
Chien-Hung Liu, Taipei, TW;
Cheng-Te Chou, Taipei, TW;
Assignee:
Other;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/00 (2006.01); H01L 27/146 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14618 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 24/05 (2013.01); H01L 27/14683 (2013.01); H01L 23/3114 (2013.01); H01L 24/03 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/83 (2013.01); H01L 24/93 (2013.01); H01L 24/94 (2013.01); H01L 25/0657 (2013.01); H01L 2224/0231 (2013.01); H01L 2224/0237 (2013.01); H01L 2224/02372 (2013.01); H01L 2224/0239 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05024 (2013.01); H01L 2224/051 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/056 (2013.01); H01L 2224/05638 (2013.01); H01L 2224/05688 (2013.01); H01L 2224/29007 (2013.01); H01L 2224/29011 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32014 (2013.01); H01L 2224/32052 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/83191 (2013.01); H01L 2224/83192 (2013.01); H01L 2224/8385 (2013.01); H01L 2224/93 (2013.01); H01L 2224/94 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/0103 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01049 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/014 (2013.01); H01L 2924/14 (2013.01); H01L 2924/01019 (2013.01); H01L 2924/01021 (2013.01); H01L 2924/01024 (2013.01); H01L 2924/01042 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/0105 (2013.01); H01L 2924/01074 (2013.01); H01L 2224/05571 (2013.01); H01L 2224/13022 (2013.01);
Abstract
The invention provides A chip package, comprising: a semiconductor substrate having opposite first and second surfaces, at least one bond pad region, and at least one device region; a plurality of conductive pad structures disposed on the bond pad region at the first surface of the semiconductor substrate; and a plurality of heavily doped regions isolated from one another, underlying and electrically connected to the conductive pad structures, wherein the heavily doped regions are disposed in a carrier substrate which is bonded to the first surface of the semiconductor substrate.