The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2014

Filed:

Mar. 14, 2013
Applicant:

Bae Systems Information & Electronic Systems Integration Inc., Nashua, NH (US);

Inventor:

Gary M Madison, Waltham, MA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/08 (2006.01);
U.S. Cl.
CPC ...
H03F 3/082 (2013.01);
Abstract

An input clamping circuit of a photo detector preamplifier is activated when an input transistor is turned off by an input overload, and the drain voltage of the input transistor is pulled toward ground by a current source. Even with extreme overloads, the operating conditions (Vgs and Id) of the input transistor remain within normal range. During normal operation, the clamping circuit is biased completely off, and has essentially no effect on circuit performance. Since the input FET itself, rather than a separate device, detects the onset of an overload, significantly improved clamping performance is realized without adding additional circuit complexity. The input transistor can be a FET. The preamplifier can be a cascode preamplifier. The clamping circuit can include a clamping FET or other clamping transistor gated by the input transistor drain. In embodiments, the clamping circuit increases current requirements of the preamplifier by no more than 25%.


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